Website Google
Minimum qualifications:
- Bachelor’s degree in Electrical Engineering, or Computer Science or equivalent practical experience.
- 10 years of experience architecting/driving SoC verification.
- Experience verifying designs (CPUs, accelerator/peripheral IPs) and with verification methodologies.
- Experience with SystemVerilog and functional coverage.
Preferred qualifications:
- Experience in a procedural programming language (e.g., C++, Python, Go).
- Experienced in the full verification lifecycle.
- Experience with industry-standard simulators, revision control systems and regression systems.
- Experience in driving cross-functional teams for high quality tape-outs.
About the job
Google engineers develop the next-generation technologies that change how users connect, explore, and interact with information and one another. As a member of an extraordinarily creative, motivated and talented team, you develop new products. We need our engineers to be versatile and passionate to take on new problems as we continue to push technology forward. If you get excited about building new things and working across discipline lines, then our team might be your next career step.
As Lead Verification Engineer, you’ll work closely with ASIC Design and Software Engineers to verify complex digital design systems. You will work as part of a Research and Development team.
Google’s mission is to organize the world’s information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people’s lives better through technology.
Responsibilities
- Plan the verification of complex digital design blocks by fully understanding design specifications. Interact with Design Engineers to identify important verification scenarios.
- Create and enhance constrained-random verification environments using SystemVerilog/UVM. Verify designs with SVA and formal tools.
- Identify and write coverage measures for stimulus and corner-cases.
- Debug tests with Design Engineers to deliver functionally correct design blocks and close coverage measures to identify verification holes and show progress towards tape-out. Debug, run and measure performance on end-to-end workloads.
- Work closely with SDK, system, and software teams to ensure integration with Google’s software stack.